As it happened with NVIDIA, AMD will have to take a hybrid approach to ray tracing technology due to the sheer limitations of the current architecture, meaning they will again have to rely on texture processors to bring the layout ray to life in real time.
Thus, BVH algorithms will, again, be the key to knowing the performance that the new RDNA 2 architecture will offer using fixed function blocks very similar to NVIDIA. However, it cannot be said that AMD is copying Huang, as the implementation is different, but the concept is similar in terms of form.
Shaders will be the key to the performance of fixed modules
In NVIDIA’s case, we’ve talked a lot about fixed-function modules known as RT Cores, so AMD will do the same with its own, which it named Fixed Function Beam Crossing Engine something like a ray crossing motor as a fixed function.
In fact, and after this name, we will find several hardware modules that specialize in BVH algorithms (using software, like in Pascal, we have already seen Turing results with the same graphics power), but at the same time they are not so Difficult, like NVIDIA’s options.
AMD’s idea is to reduce the dependency of the raytracing datastore by using the current texture system memory buffers. This has two positive factors: the area of the microcircuit does not increase, and at the same time it is a more simplified design for the architecture.
Without an additional hardware scheduler, is AMD’s best approach to Ray Tracing?
It is not clear at the moment, there are rumors of an alleged demo of Cyberpunk 2077 on the alleged RDNA 2. GPU / GPU vs. RTX 2080 SUPER where apparently the AMD variant is much faster in Ray Tracing. Of course, grabbing this information with tweezers is just rumor.
Anyway, everything seems to indicate that AMD’s approach is based on shaders that send raytraced data to a texture pipeline to handle fixed intersection engines. What does this mean on paper? In theory, more intersections are processed per second, and these calculations require fewer clock cycles to complete, which improves performance.
For this, the architecture will have a number of blocks: Shaders, texture processors or TPs, large caches and above all interconnection of them with thrusters crossing lightning. Thus, the AMD system is much easier than NVIDIA for developers, since in the case of Huang, programmers must work with at least two different engines. (Shader + RT) Instead, AMD is reusing many of its nodes and tires, where only the new crossover motors are new per se.
It takes advantage of the graphics to perform computations stored in the same cache and gives the programmer the ability to use drives and routes that it can work with, optimizing performance, reducing consumption, and not creating large chips.
There are two hybrid approaches that work on paper, we’ll have to wait for both. Rdnc 2 and Ampere to be on the market, to see which technique is the most optimal.